EE6301 Digital Logic Circuits Syllabus
EE6301 Digital Logic Circuits Syllabus Regulation 2013 Anna University free download. EE6301 Syllabus Digital Logic Circuits pdf free download.
OBJECTIVES EE6301 Digital Logic Circuits Syllabus:
To study various number systems , simplify the logical expressions using Boolean functions
To study implementation of combinational circuits
To design various synchronous and asynchronous circuits.
To introduce asynchronous sequential circuits and PLCs
To introduce digital simulation for development of application oriented logic circuits.
UNIT I NUMBER SYSTEMS AND DIGITAL LOGIC FAMILIES EE6301 Digital Logic Circuits Syllabus
Review of number systems, binary codes, error detection and correction codes (Parity and Hamming code0- Digital Logic Families ,comparison of RTL, DTL, TTL, ECL and MOS families -operation, characteristics of digital logic family.
UNIT II COMBINATIONAL CIRCUITS EE6301 Digital Logic Circuits Syllabus
Combinational logic – representation of logic functions-SOP and POS forms, K-map representationsminimization using K maps – simplification and implementation of combinational logic – multiplexers and demultiplexers – code converters, adders, subtractors.
UNIT III SYNCHRONOUS SEQUENTIAL CIRCUITS EE6301 DLC Syllabus
Sequential logic- SR, JK, D and T flip flops – level triggering and edge triggering – counters – asynchronous and synchronous type – Modulo counters – Shift registers – design of synchronous sequential circuits – Moore and Melay models- Counters, state diagram; state reduction; state assignment.
UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUITS AND PROGRAMMABLE
LOGIC DEVICES EE6301 Digital Logic Circuits Syllabus
Asynchronous sequential logic circuits-Transition table, flow table-race conditions, hazards &errors in digital circuits; analysis of asynchronous sequential logic circuits-introduction to Programmable Logic Devices: PROM – PLA –PAL.
UNIT V VHDL EE6301 Digital Logic Circuits DLC Syllabus
RTL Design – combinational logic – Sequential circuit – Operators – Introduction to Packages – Subprograms – Test bench. (Simulation /Tutorial Examples: adders, counters, flipflops, FSM, Multiplexers /Demultiplexers).
| Subject Name | Digital Logic Circuits |
| Subject code | EE6301 |
| Regulation | 2013 |
EE6301 Digital Logic Circuits Syllabus Click here to download
EE6301 Digital Logic Circuits Notes
EE6301 Digital Logic Circuits Important questions
EE6301 Digital Logic Circuits Question Bank