EC8095 Question Bank VLSI Design Regulation 2017 Anna University

EC8095 Question Bank VLSI Design

EC8095 Question Bank VLSI Design Regulation 2017 Anna University free download. VLSI Design Question Bank EC8095 pdf free download.

Sample EC8095 Question Bank VLSI Design

Analyse the following static CMOS logic.
(i) Bubble pushing, (4)
(ii) Compound gates, (4)
(iii) Skewed gates. (5)
BTL 4
Analyzing
2.
Illustrate the following circuits in detail.
(i) Pseudo-nMOS, (8)
(ii) Ganged CMOS. (5)
BTL 2
Understanding
3.
(i) Explain in detail about Cascode voltage switch logic. (8)
(ii) Infer the modes of operation in dynamic circuits. EC8095 Question Bank VLSI Design
Write short notes on
(i) Domino logic, (7)
(ii) Dual-rail Domino Logic. (6)
BTL 1
Remembering
5.
Draw the 2-input multiplexers using the following circuit techniques.
(i) static CMOS, (3)
(ii) Pseudo-nMOS, (3)
(iii) CVSL, (3)
(iv) Dual-rail Domino. (4)
EC8095 Question Bank VLSI Design
Summarize the following.
(i) Pass transistor logic, (7)
(ii) Complementary pass transistor logic. (6)
BTL 2
Understanding
7.
Evaluate the design of Differential Cascode Voltage Switch with Pass Gate (DCVSPG). (13)
BTL 5
Evaluating
8.
Describe in detail about the following.
(i) Keepers, (5)
(ii) Multiple-Output Domino Logic (MODL), (4)
(iii) NP and Zipper Domino. (4)
EC8095 QB VLSI Design
Illustrate the Cascode Voltage Switch Logic with neat diagram. (13)
BTL 3
Applying
10.
Classify the types of power dissipation and manipulate each in detail. (13)
EC8095 Question Bank VLSI Design
(i) Define Multiple Threshold voltages. (3)
(ii) Examine the P/N Ratios for logic gates. (10)
BTL 1
Remembering
12.
Manipulate the various Ratioed circuits for CMOS circuits.
(13)
BTL 3
Applying
13.
Discuss the structure and working of CMOS with transmission gates. (13)
BTL 2
Understanding
14.
Construct the various low-power reduction techniques

1. Write about static CMOS circuits. BTL 1 Remembering
2. What is meant by bubble pushing? BTL 1 Remembering
3.
Generalize the skewed gates and calculate the logical effort
for HI-skew inverter.
EC8095 Question Bank VLSI Design
4. Summarize the Multiple threshold voltages for CMOS. BTL 2 Understanding
5. Analyse the pseudo-nMOS logic gates. BTL 4 Analyzing
6. Construct the symmetric 2-input NOR gate with its truth table. Analyzing

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