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# CS8351 Important Questions Digital Principles and System Design

CS8351 Important Questions Digital Principles and System Design Regulation 2017 Anna University free download. Digital Principles and System Design Important Questions CS8351 pdf free download.

## Sample CS8351 Important Questions Digital Principles and System Design:

PART-A (2 Marks) CS8351 Important Questions Digital Principles and System Design

1.What is the use of state diagram?
2. What is state table?
3. What is a state equation?
4. Differentiate ASM chart and conventional flow chart?
5. What is flow table?
6. What is primitive flow table?
7. Define race condition.
8. Define critical & non-critical race with example.
9. How can a race be avoided?
10. Define hazards.

PART-B CS8351 Important Questions Digital Principles and System Design

1. Design an Asynchronous sequential circuit using SR latch with
two inputs A and B and one output y. B is the control input which, when equal to 1, transfers the input A to output y. when B is 0, the output does not change, for any change in input. (16)
2. Give hazard free relation for the following Boolean function.
F (A, B, C, D) =_m (0, 2, 6, 7, 8, 10, 12) (16)
5. Design T Flip flop from Asynchronous Sequential circuit? (16)

PART-A (2 Marks) CS8351 Important Questions Digital Principles and System Design

1. What is sequential circuit?
2. List the classifications of sequential circuit.
3. What is Synchronous sequential circuit?
4. List different types of flip-flops.
5. What do you mean by triggering of flip-flop.
6. What is an excitation table?
7. Give the excitation table of a JK flip-flop
8. Give the excitation table of a SR flip-flop
9. Give the excitation table of a T flip-flop

PART-B CS8351 Important Questions Digital Principles and System Design

1. Design a counter with the following repeated binary sequence:0,
1, 2,3, 4, 5, 6.
use JK Flip-flop. (16)
2. Describe the operation of SR flip-flop (16)
3. Design a sequential circuit using JK flip-flop for the following
state table [use state
diagram] (16)
4. The count has a repeated sequence of six states, with flip flops B
and C repeating the
binary count 00, 01, 10 while flip flop A alternates between 0 and 1
every three counts.
Designs with JK flip-flop (16)
5. Design a 3-bit T flip-flop counter (16)

 Subject name Digital Principles and System Design Semester 3 Subject Code CS8351 Regulation 2017 regulation