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EE8351 Important 16 mark Questions DIGITAL LOGIC CIRCUITS Regulation 2017 Anna University

EE8351 Important 16 mark Questions DIGITAL LOGIC CIRCUITS

EE8351 Important 16 mark Questions DIGITAL LOGIC CIRCUITS Regulation 2017 Anna University free download. DIGITAL LOGIC CIRCUITS Important 16 mark Questions EE8351 pdf free download.

Sample EE8351 Important 16 mark Questions DIGITAL LOGIC CIRCUITS:

1. Develop the state diagram and primitive flow table for a logic system that has two inputs S and R and a single output Q. The device is to be an edge triggered SR flip- flop but without a clock. The device changes state on the rising edges of the two inputs. Static input values are not to have any effect in changing the Q output (16) EE8351 Important 16 mark Questions Digital Logic Circuits

2. Design an asynchronous sequential circuit that has two inputs X2 and X1 and one output Z. The output is to remain a 0 as long as X1 is a 0. The first change in X2 that occurs while X1 is a 1 will cause a Z to be a 1. Z is to remain a 1 until X1 returns to 0. Construct a state diagram and flow table. Determine the output equations. (16) EE8351 Important 16 mark Questions Digital Logic Circuits

3. Construct the state diagram of a Mealey Pattern detector that can detect a serial string of 4 inputs,where each input is a four bit code. If the string of four bit codes is correctly
received,then an output is generated. An incorrect input code pattern is to generate a second output.The second output is to be asserted only after receiving the sequence of four bit codes.

4. Draw the state diagram and obtain the primitive flow table for a circuit with two inputs x1 and x2 and two outputs z1 and z2 that satisfies the following conditions. When x1 x2 = 00 output z1 z2 = 00, when x1= 1 and x2 changes from 0 to 1 the output z1 z2 = 01, when x2= 1 and x1 changes from 0 to 1 the output z1 z2 = 10 otherwise output does not change. (16) EE8351 Important 16 mark Questions Digital Logic Circuits

5. Design an asynchronous binary toggle circuit that changes state with each rising edge of clock input. Assume the initial output as zero. (16)

6. Write notes on the following giving one example for each. (8)
Stable state,Unstable state,Cycles,Race

7.Analyze the Boolean expression, K- Map, transition and state table and primitive flow table of the following asynchronous sequential circuits. EE8351 Important 16 mark Questions Digital Logic Circuits

Subject name DIGITAL LOGIC CIRCUITS
Semester 3
Subject Code EE8351
Regulation 2017 regulation

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